Mechanism for forming metal gate structure

摘要

Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. A source region and a drain region are formed in the semiconductor substrate, and metal silicide regions are formed in the source region and the drain region, respectively. The semiconductor device further includes a metal gate stack formed over the semiconductor substrate and between the source region and the drain region. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the insulating layer has contact openings exposing the metal silicide regions, respectively. The semiconductor device includes a dielectric spacer liner layer formed over inner walls of the contact openings, wherein the whole of the dielectric spacer liner layer is right above the metal silicide regions. The semiconductor device includes contact plugs formed in the contact openings.

主权项

1. A semiconductor device, comprising:
a semiconductor substrate, wherein a source region and a drain region are formed in the semiconductor substrate, and metal silicide regions are formed in the source region and the drain region, respectively; a metal gate stack formed over the semiconductor substrate and between the source region and the drain region, wherein the metal gate stack comprises a gate electrode and a work function metal layer, and the work function metal layer covers a sidewall and a bottom surface of the gate electrode; an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the insulating layer has contact openings exposing the metal silicide regions, respectively, and a first pre-amorphized implantation element is implanted in the metal silicide regions and the insulating layer adjacent to the contact openings, wherein the first pre-amorphized implantation element includes phosphorus (P), xenon (Xe), carbon (C), germanium (Ge), boron fluoride (BF2), arsenic (As), or fluorine (F); a dielectric spacer liner layer formed over inner walls of the contact openings, wherein the whole of the dielectric spacer liner layer is right above the metal silicide regions, and a second pre-amorphized implantation element is implanted in the metal silicide regions and the dielectric spacer liner layer; and contact plugs formed in the contact openings.