发明名称 Nonvolatile memory device capable of reducing a setup/precharge speed of a bitline for reducing peak current and related programming method
摘要 A method of programming a memory cell of a nonvolatile memory device by executing a plurality of program loops comprises detecting whether a loop count or a level of a program pulse to be applied to the memory cell is within a specific range, wherein the specific range is an operation section in which a level of a current peak flowing into the bitline increases up to a reference value or more, charging a bitline of the memory cell at a first charging speed or a second charging speed slower than the first charging speed according to a result of the detection, and applying the program pulse to a wordline of the memory cell.
申请公布号 US9230659(B2) 申请公布日期 2016.01.05
申请号 US201414223368 申请日期 2014.03.24
申请人 Samsung Electronics Co., Ltd. 发明人 Choi Yoon-Hee;Nam Sang-Wan
分类号 G11C5/14;G11C16/10;G11C16/04;G11C16/34;G11C16/24 主分类号 G11C5/14
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A method of programming a memory cell of a nonvolatile memory device by executing a plurality of program loops, the method comprising: detecting whether a loop count or a level of a program pulse to be applied to the memory cell is within a specific range, wherein the specific range is an operation section in which a level of a current peak flowing into the bitline increases up to a reference value or more; charging a bitline of the memory cell at a first charging speed or a second charging speed slower than the first charging speed according to a result of the detection; and applying the program pulse to a wordline of the memory cell.
地址 Suwon-si, Gyeonggi-do KR