| 发明名称 | Feature patterning methods and structures thereof | ||
| 摘要 | Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of patterning a feature includes forming a first portion of the feature in a first material layer. A second portion of the feature is formed in the first material layer, and a third portion of the feature is formed in a second material layer. | ||
| 申请公布号 | US9230906(B2) | 申请公布日期 | 2016.01.05 |
| 申请号 | US201414225095 | 申请日期 | 2014.03.25 |
| 申请人 | Infineon Technologies AG | 发明人 | Schulz Thomas;Postnikov Sergei |
| 分类号 | H01L27/10;H01L23/52;H01L21/027;H01L23/522 | 主分类号 | H01L27/10 |
| 代理机构 | Slater & Matsil, L.L.P. | 代理人 | Slater & Matsil, L.L.P. |
| 主权项 | 1. A semiconductor device, comprising: a first material layer and a second material layer disposed over a workpiece, the second material layer being adjacent the first material layer; a first portion of a feature being disposed in the first material layer; a second portion of the feature being disposed in the first material layer proximate the first portion of the feature; and a third portion of the feature being disposed in the second material layer, wherein the third portion of the feature couples the first portion of the feature to the second portion of the feature, wherein the third portion of the feature is connected to a dummy structure. | ||
| 地址 | Neubiberg DE | ||