High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate

摘要

Embodiments of methods, apparatus, and systems for extracting impedance for a circuit design are disclosed herein. Some of the disclosed embodiments are computationally efficient and can accurately compute the frequency-dependent impedance of VLSI interconnects and/or intentional inductors in the presence of multi-layer conductive substrates. In certain embodiments, the resulting accuracy and CPU time reduction are a result of a Green's function approach with the correct quasi-static limit, a modified discrete complex image approximation to the Green's function, and a continuous dipole expansion to evaluate the magnetic vector potential at the distances relevant to VLSI interconnects and intentional inductors.

主权项

1. One or more computer-readable memory or storage devices storing computer-executable instructions which when executed by a computer cause the computer to perform a method, the method comprising:
receiving layout information indicative of at least signal-wire segments in a circuit design and substrate profile information indicative of electrical characteristics of a substrate over which the circuit design is to be implemented; performing impedance extraction using the layout information and the substrate profile information, wherein the impedance extraction generates a plurality of impedance values for the signal-wire segments and wherein the substrate is not represented by a plurality of filaments during the impedance extraction; and generating a representation of electrical characteristics of the circuit design, the representation comprising the impedance values.