发明名称 |
Systems and methods for maintaining an order of read and write transactions in a computing system |
摘要 |
Systems and methods for maintaining an order of read and write transactions for each source through a bridge in a bus fabric. The bridge provides a connection from a first bus to a second bus within the bus fabric. The first bus has a single path for read and write transactions and the second bus has separate paths for read and write transactions. The bridge maintains a pair of counters for each source in a SoC to track the numbers of outstanding read and write transactions. The bridge prevents a read transaction from being forwarded to the second bus if the corresponding write counter is non-zero, and the bridge prevents a write transaction from being forwarded to the second bus if the corresponding read counter is non-zero. |
申请公布号 |
US9229896(B2) |
申请公布日期 |
2016.01.05 |
申请号 |
US201213724886 |
申请日期 |
2012.12.21 |
申请人 |
Apple Inc. |
发明人 |
Balkan Deniz;Saund Gurjeet S. |
分类号 |
G06F13/36;G06F13/40 |
主分类号 |
G06F13/36 |
代理机构 |
Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. |
代理人 |
Rankin Rory D.;Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. |
主权项 |
1. A bridge circuit comprising control logic, wherein the control logic is configured to:
maintain a pair of counters for each agent of a plurality of agents, wherein each pair of counters comprises a write counter and a read counter, wherein the write counter tracks a number of outstanding write transactions for a respective agent, and wherein the read counter tracks a number of outstanding read transactions for the respective agent; forward a read transaction from a given agent out of the bridge circuit only if the write counter for the given agent is equal to zero; and forward a write transaction from the given agent out of the bridge circuit only if the read counter for the given agent is equal to zero. |
地址 |
Cupertino CA US |