发明名称 |
PIXEL-BASED WARPING AND SCALING ACCELERATOR |
摘要 |
Technologies are presented that allow efficient pixel-based image and/or video warping and scaling. An image processing system may include a memory and an accelerator unit communicatively coupled with the memory. The accelerator unit may, based on configuration settings, receive, from a memory, at least a portion of an input image as an array of neighboring four-cornered shapes; and process each shape by: determining locations of an array of output pixels delineated by four corner locations of the shape via linearization; interpolating a value of each pixel of the array of output pixels; and storing the interpolated pixel values in the memory. For warping, the array of neighboring four-cornered shapes may include an array of neighboring distorted tetragons that approximate distortion of the input image, and the interpolated pixel values may represent a warped output image. For scaling, the array of neighboring four-cornered shapes may include an array of neighboring rectangles. |
申请公布号 |
US2015379666(A1) |
申请公布日期 |
2015.12.31 |
申请号 |
US201414317234 |
申请日期 |
2014.06.27 |
申请人 |
Intel Corporation |
发明人 |
Redzic Dmitar;Beric Aleksandar;Van Dalen Edwin |
分类号 |
G06T1/20;G06T3/40;G06T3/00 |
主分类号 |
G06T1/20 |
代理机构 |
|
代理人 |
|
主权项 |
1. An image processing system, comprising:
a memory; and an accelerator unit communicatively coupled with the memory, wherein the accelerator unit is to, based on configuration settings:
receive, from the memory, at least a portion of an input image as an array of neighboring four-cornered shapes; andprocess each shape by:
determining locations of an array of output pixels delineated by four corner locations of the shape via linearization;interpolating a value of each pixel of the array of output pixels; andstoring the interpolated pixel values in the memory for corresponding determined locations. |
地址 |
Santa Clara CA US |