CO-PROCESSOR MEMORY ACCESSES IN A TRANSACTIONAL MEMORY

摘要

Buffering a memory operand from a co-processor associated with a processor as a speculative store in a store accumulator of the processor, the processor including a cache and the store accumulator, the store accumulator buffering memory operands for writing to a higher level cache. Executing a transactional memory transaction, including the following. Suspending storing of memory operands in the store accumulator entries into the next higher level cache. Initiating a co-processor operation. Accumulating co-processor memory operands into corresponding locations of one or more queue entries of the accumulator associated with the transaction, and not storing the co-processor memory operands into the cache. Based on the transaction ending, storing accumulated co-processor memory operands from the one or more store accumulator entries associated with the transaction into the next higher level cache.

主权项

1. A method for buffering a memory operand from a co-processor associated with a processor as a speculative store in a store accumulator of the processor, the processor including a cache and the store accumulator, the store accumulator buffering memory operands for writing to a higher level cache, the method comprising:
storing first memory operands from the processor into one or more cache entries of the cache; accumulating the first memory operands into corresponding locations of one or more store accumulator entries of the store accumulator; periodically storing accumulated first memory operands from one or more of the store accumulator entries into a next higher level cache; executing, by the processor, a transactional memory transaction, the execution comprising:
suspending storing of memory operands in the store accumulator entries into the next higher level cache;initiating, by the transaction, a co-processor operation;storing second processor memory operands of the transaction into one or more cache entries of the cache;accumulating the second processor memory operands of the transaction into corresponding locations of one or more store accumulator entries of the store accumulator associated with the transaction;accumulating third co-processor memory operands into corresponding locations of one or more queue entries of the accumulator associated with the transaction, and not storing the co-processor memory operands into the cache; andbased on the transaction ending, storing accumulated second processor memory operands and third co-processor memory operands from the one or more store accumulator entries associated with the transaction into the next higher level cache.