| 发明名称 |
COMPACT CMOS DEVICE ISOLATION |
| 摘要 |
An integrated circuit includes a first well of the first conductivity type formed in a semiconductor layer where the first well housing active devices and being connected to a first well potential, a second well of a second conductivity type formed in the semiconductor layer and encircling the first well where the second well housing active devices and being connected to a second well potential, and a buried layer of the second conductivity type formed under the first well and overlapping at least partially the second well encircling the first well. In an alternate embodiment, instead of the buried layer, the integrated circuit includes a third well of the second conductivity type formed in the semiconductor layer where the third well contains the first well and overlaps at least partially the second well encircling the first well. |
| 申请公布号 |
US2015380413(A1) |
申请公布日期 |
2015.12.31 |
| 申请号 |
US201414320451 |
申请日期 |
2014.06.30 |
| 申请人 |
Alpha and Omega Semiconductor Incorporated |
发明人 |
Mallikarjunaswamy Shekar |
| 分类号 |
H01L27/092;H01L29/06;H01L21/8238 |
主分类号 |
H01L27/092 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit, comprising:
a semiconductor layer of a first conductivity type and being lightly doped; a first well of the first conductivity type formed in the semiconductor layer, the first well housing active devices and being connected to a first well potential, a second well of a second conductivity type formed in the semiconductor layer and encircling the first well, the second well housing active devices and being connected to a second well potential; and a buried layer of the second conductivity type formed under the first well and overlapping at least partially the second well encircling the first well. |
| 地址 |
Sunnyvale CA US |
