发明名称 ARCHITECTURE AND EXECUTION FOR EFFICIENT MIXED PRECISION COMPUTATIONS IN SINGLE INSTRUCTION MULTIPLE DATA/THREAD (SIMD/T) DEVICES
摘要 A method for improving power, performance, area (PPA) for mixed precision computations in a processing environment. The method includes determining a braiding factor as a number of units of work encoded into a physical thread. A value of the braiding factor is determined based on a mix of precision requirements presented for individual units of work. Units of work are classified as instructions for applied code transformation based on associated precision requirements for the processing environment. Instruction inputs from specified registers are packed together into a destination register according to the determined value of the braiding factor. The packed instructions presented in vector form are executed with an instruction set architecture configured for executing packed instructions of different precisions.
申请公布号 US2015378741(A1) 申请公布日期 2015.12.31
申请号 US201514672694 申请日期 2015.03.30
申请人 Samsung Electronics Company, Ltd. 发明人 Lukyanov Maxim;Grosul Alexander;Alsup Mitchell;Beylin Boris
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
代理机构 代理人
主权项 1. A method for improving power, performance, area (PPA) for mixed precision computations in a processing environment, the method comprising: determining a braiding factor as a number of units of work encoded into a physical thread; determining a value of the braiding factor based on a mix of precision requirements presented for individual units of work; classifying units of work as instructions for applied code transformation based on associated precision requirements for the processing environment; packing instruction inputs from specified registers together into a destination register according to the determined value of the braiding factor; and executing the packed instructions presented in vector form with an instruction set architecture configured for executing packed instructions of different precisions.
地址 Suwon-si KR