发明名称 SHIFT AMOUNT CORRECTION FOR MULTIPLY-ADD
摘要 Methods and apparatuses for performing a floating point multiply-add operation with alignment correction. A processor receives a first operand, a second operand and a third operand, wherein the first, second and third operands each represent a floating point number comprising a significand value and a biased exponent value. A processor determines a shift amount based, at least in part, on the one or more biased exponent values of the first, second or third operand. A processor determines a shift amount correction based, at least in part, on the one or more biased exponent values of the first, second or third operand being equal to zero.
申请公布号 US2015378677(A1) 申请公布日期 2015.12.31
申请号 US201414317335 申请日期 2014.06.27
申请人 International Business Machines Corporation 发明人 Dao Son T.;Mueller Silvia Melitta
分类号 G06F7/483;G06F5/01 主分类号 G06F7/483
代理机构 代理人
主权项
地址 Armonk NY US