发明名称 HIGH SPEED SIGNAL GENERATOR
摘要 A high-speed signal generator. A digital signal processing (DSP) block generates a set of N (where N is an integer and N≧2) parallel digital sub-band signals, each digital sub-band signal having frequency components within a spectral range between 0 Hz and ±Fs/2, where Fs is a sample rate of the digital sub-band signals. A respective Digital-to-Analog Converter (DAC) processes each digital sub-band signal to generate a corresponding analog sub-band signal, each DAC having a sample rate of Fs/2. A combiner combines the analog sub-band signals to generate an output analog signal having frequency components within a spectral range between 0 Hz and ±NFs/2.
申请公布号 US2015381281(A1) 申请公布日期 2015.12.31
申请号 US201514846848 申请日期 2015.09.07
申请人 KRAUSE David;LAPERLE Charles;ROBERTS Kim B. 发明人 KRAUSE David;LAPERLE Charles;ROBERTS Kim B.
分类号 H04B10/516;H04B10/50 主分类号 H04B10/516
代理机构 代理人
主权项 1. A high-speed signal generator comprising: a digital signal processing (DSP) block configured to generate a set of N (where N is an integer and N≧2) parallel digital sub-band signals, each digital sub-band signal having frequency components within a spectral range between 0 Hz and ±Fs/2, where Fs is a sample rate of the digital sub-band signals; a respective Digital-to-Analog Converter (DAC) configured to process each digital sub-band signal to generate a corresponding analog sub-band signal, each DAC having a sample rate of Fs/2; and a combiner configured to combine the analog sub-band signals to generate an output analog signal having frequency components within a spectral range between 0 Hz and ±N·Fs/2; wherein the digital signal processing (DSP) block comprises: a memory configured to store predetermined sample values of each digital sub-band signal; anda controller circuit configured to retrieve sample values of each digital sub-band signal from the memory, and for outputting the retrieved sample values to the respective DAC, at the sample rate Fs.
地址 Nepean CA
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