发明名称 |
ENCODER WITH TRANSFORM ARCHITECTURE FOR LDPC CODES OVER SUBFIELDS USING MESSAGE MAPPING |
摘要 |
A low-density parity-check (LDPC) encoder is configured to encode data for storage into a non-volatile memory of a data storage device. The LDPC encoder includes a message mapping circuit configured to receive an input message and to generate a mapped message based on the input message. The LDPC encoder also includes a matrix multiplier circuit configured to multiply the mapped message with columns of a Fourier transform of an LDPC generator matrix to generate at least a portion of a transform of an LDPC codeword. The LDPC encoder is configured to provide the transform of the LDPC codeword to an inverse Fourier transform circuit to generate the LDPC codeword. |
申请公布号 |
US2015381204(A1) |
申请公布日期 |
2015.12.31 |
申请号 |
US201414316117 |
申请日期 |
2014.06.26 |
申请人 |
SANDISK ENTERPRISE IP LLC |
发明人 |
ZHANG XINMIAO;TAI YING YU |
分类号 |
H03M13/11;G06F11/10 |
主分类号 |
H03M13/11 |
代理机构 |
|
代理人 |
|
主权项 |
1. A data storage device comprising:
a non-volatile memory; and a quasi-cyclic low-density parity-check (QC-LDPC) encoder configured to encode data for storage into the non-volatile memory, the QC-LDPC encoder including:
a message mapping circuit configured to receive an input message and to generate a mapped message based on the input message; anda matrix multiplier circuit configured to multiply the mapped message with columns of a Fourier transform of an LDPC generator matrix to generate at least a portion of a transform of an LDPC codeword, wherein the QC-LDPC encoder is configured to provide the transform of the LDPC codeword to an inverse Fourier transform circuit to generate the LDPC codeword. |
地址 |
Dallas TX US |