发明名称 |
SPECULATION CONTROL FOR IMPROVING TRANSACTION SUCCESS RATE, AND INSTRUCTION THEREFOR |
摘要 |
Throttling instruction execution in a transaction operating in a processor configured to execute memory instructions out-of-order in a pipelined processor, wherein memory instructions are instructions for accessing operands in memory is provided. Included is executing, by the processor, instructions of a transaction comprising determining whether the transaction is in throttling mode and based on the transaction being in throttling mode, executing memory instructions in-program-order. Also included is based on the transaction not-being in throttling mode, executing memory instructions out-of-program order. |
申请公布号 |
US2015378897(A1) |
申请公布日期 |
2015.12.31 |
申请号 |
US201514842879 |
申请日期 |
2015.09.02 |
申请人 |
International Business Machines Corporation |
发明人 |
Gschwind Michael Karl;Salapura Valentina;Schwarz Eric M.;Shum Chung-Lung K.;Slegel Timothy J. |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
1. A computer implemented method for throttling instruction execution in a transaction operating in a processor configured to execute memory instructions out-of-order in a pipelined processor, wherein memory instructions are instructions for accessing operands in memory, the method comprising:
executing, by the processor, instructions of a transaction comprising: determining whether the transaction is in throttling mode; and based on the transaction being in throttling mode, executing memory instructions in-program-order; and based on the transaction not-being in throttling mode, executing memory instructions out-of-program order. |
地址 |
Armonk NY US |