发明名称 |
SELF-ALIGNED DUAL DAMASCENE PROCESS WITH AIR-GAP ASSISTED ETCH |
摘要 |
<p>A semiconductor process for providing a metal layer uses the following steps: A barrier dielectric layer (100) is deposited on a semiconductor layer comprising an exposed metal line (90). A via layer (110) is formed on top of the barrier dielectric layer comprising at least one via (140). A non-conformal film (150) is deposited on top of the via layer thereby transforming the at least one via into a void (140), and at least one trench is etched into the non-conformal film thereby opening the void, and creating a dual-damascene layer.</p> |
申请公布号 |
WO2015200748(A1) |
申请公布日期 |
2015.12.30 |
申请号 |
WO2015US37880 |
申请日期 |
2015.06.26 |
申请人 |
MICROCHIP TECHNOLOGY INCORPORATED |
发明人 |
SATO, JUSTIN HIROKI;TAYLOR, ANDREW ALEXANDER |
分类号 |
H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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