发明名称 MEMORY CELLS AND LOGIC CELLS HAVING TRANSISTORS WITH DIFFERENT NUMBERS OF NANOWIRES OR 2D MATERIAL STRIPS
摘要 An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of a memory cell including a plurality of transistors, at least some of the transistors in the plurality having channels comprising respective sets of one or more nanowires or 2D material strips, and wherein the channel of one of the transistors in the plurality has a different number of nanowires or 2D material strips than a channel of another transistor in the plurality. An integrated circuit including the memory cell is described.
申请公布号 WO2015200363(A1) 申请公布日期 2015.12.30
申请号 WO2015US37252 申请日期 2015.06.23
申请人 SYNOPSYS, INC. 发明人 KAWA, JAMIL;MOROZ, VICTOR
分类号 H01L21/00 主分类号 H01L21/00
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