发明名称 |
Write-assisted memory with enhanced speed |
摘要 |
A write-assisted memory includes a pre-charge assist circuit that assists the pre-charge of the power supply voltage on a power supply lead for an accessed memory cell in a bit-line-multiplexed group of memory cells subsequent to a write-assist period by coupling charge from the power supply leads for the remaining non-accessed memory cells in the bit-line-multiplexed group of memory cells. |
申请公布号 |
US9224453(B2) |
申请公布日期 |
2015.12.29 |
申请号 |
US201313799532 |
申请日期 |
2013.03.13 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Jin Peng;Abu-Rahma Mohamed Hassan;Ahmed Fahad |
分类号 |
G11C11/419;G11C5/14 |
主分类号 |
G11C11/419 |
代理机构 |
Haynes and Boone, LLP |
代理人 |
Haynes and Boone, LLP |
主权项 |
1. A memory, comprising:
a plurality of SRAM cells a plurality of power supply leads corresponding to the plurality of SRAM cells, each SRAM cell coupled to its corresponding power supply lead to receive power; a plurality of write assist circuits corresponding to the plurality of power supply leads, wherein each power supply lead couples to a power supply node through its corresponding write assist circuit, each write assist circuit being configured to lower a power supply voltage on its corresponding power supply lead during a write operation on the corresponding SRAM cell; and a pre-charge assist circuit including a plurality of pre-charge switches configured to couple the plurality of power supply leads together to share charge subsequent to each write operation. |
地址 |
San Diego CA US |