发明名称 Systems and methods of reducing timing measurement error due to clock offset
摘要 Navigation systems for use in indoor environments may include a navigation system that can calculate a time of flight of signals between a navigation device and a WiFi® Access Point. Such a calculation can be more accurate not just by using more accurate oscillators in devices, but by correcting a relative error between two devices. This relative error may be found by determining a timing offset correction, a difference in accuracy between the navigation device and the WiFi® Access Point. This may be performed by performing a fine frequency estimation on a long training field or by receiving a parts per million (ppm) offset from another device. Once the ppm offset is determined, the accuracy of the navigation device can be improved by a factor of 50 using a series of equations described in the disclosure.
申请公布号 US9222785(B2) 申请公布日期 2015.12.29
申请号 US201313926314 申请日期 2013.06.25
申请人 Intel Corporation 发明人 Banin Leor;Amizur Yuval;Schatzberg Uri;Stephens Adrian P
分类号 G05D1/02;G06F17/10;G06G7/78;G01C21/20;G01S5/02;G01S5/14 主分类号 G05D1/02
代理机构 Schwegman Lundberg & Woessner, P.A. 代理人 Schwegman Lundberg & Woessner, P.A.
主权项 1. A wireless station (STA) comprising: computer processing circuitry including a clock; and transceiver and network interface circuitry; wherein the transceiver and network interface circuitry: sends a first action frame to a first external device;receives a first acknowledgement signal from the first external device which acknowledges that the first external device received the first action frame;receives a second action frame from the first external device, the second action frame including a first timestamp indicating a time at which the first external device received the first action frame and a second timestamp indicating a time at which the first external device sent the second action frame; andsends a second acknowledgement signal to the first external device upon receipt of the second action frame; and wherein the computer processing circuitry: estimates a timing offset correction between the STA and the first external device by using a relative frequency offset comparing a frequency of a clock of the first external device with a frequency of the clock of the computer processing circuitry of the STA, wherein the timing offset correction is estimated without use of satellite positioning signals;calculates a corrected first timestamp by dividing the timing offset correction by the first timestamp;calculates a corrected second timestamp by dividing the timing offset correction by the second timestamp;calculates a fine timing measurement (FTM) between the STA and the first external device using the corrected first timestamp and the corrected second timestamp; andcalculates the distance between the STA and the first external device using the FTM;determines a location of the STA by using trilateration of three separately calculated distances between the STA and three time-synchronized external devices with known locations that are part of the same wireless network; wherein one of the three external devices is the first external device; andcontrols an output of the determined location of the STA.
地址 Santa Clara CA US