Connections for memory electrode lines

摘要

Subject matter disclosed herein may relate to word line electrodes and/or digit line electrodes in a cross-point array memory device. One or more word line electrodes may be configured to form a socket area to provide connection points to drivers and/or other circuitry that may be located within a footprint of an array of memory cells.

主权项

1. An integrated circuit comprising a socket region in which vertical connections are made to a metal level, the integrated circuit comprising:
a plurality of conductive lines extending parallel to one another along a first direction outside of the socket region; a first subset of the conductive lines extending in the first direction and terminating at the socket region, wherein the first subset of the conductive lines includes at least two conductive lines that co-terminate at substantially the same position along the first direction, and the first subset of the conductive lines further includes at least one conductive line that does not co-terminate with the at least two conductive lines and extends farther along the first direction into the socket region; a second subset of the conductive lines that extend through the socket region, wherein each conductive line of the second subset of the conductive lines includes a jog segment within the socket region, each jog segment deviating from parallel to the first direction; and a plurality of conductive vertical connectors positioned within the socket region, at least one of the conductive vertical connectors contacting one of the jog segments of the second subset of the conductive lines.