发明名称 Method for polishing semiconductor wafers by means of simultaneous double-side polishing
摘要 A method of polishing a semiconductor wafer includes simultaneous double-side polishing the wafer in a gap of a polishing device between a lower polishing plate covered with a lower polishing pad and upper polishing plate covered with an upper polishing pad while supplying a polishing agent. A first of the upper and lower polishing pads is dressed using a dressing tool. The dressing tool is mounted in the gap so that it extends from the inner edge to the outer edge of the first polishing pad. The distance between the dressing tool and a second of the upper and lower polishing pads at the inner edge of the second polishing pad differs from a corresponding distance at the outer edge of the second polishing pad. After the dressing, the at least one semiconductor wafer in the gap is polished.
申请公布号 US9221149(B2) 申请公布日期 2015.12.29
申请号 US201414249377 申请日期 2014.04.10
申请人 SILTRONIC AG 发明人 Baumann Rainer;Staudhammer Johannes;Heilmaier Alexander;Mistur Leszek;Roettger Klaus
分类号 B24B37/08;H01L21/304;B24B53/017 主分类号 B24B37/08
代理机构 Leydig, Voit & Mayer, Ltd. 代理人 Leydig, Voit & Mayer, Ltd.
主权项 1. A method of polishing at least one semiconductor wafer in a gap of a polishing device between a lower polishing plate, covered with a lower polishing pad, and an upper polishing plate, covered with an upper polishing pad, while supplying a polishing agent, the polishing plates and the polishing pads having an inner edge and an outer edge, the method comprising: dressing a first of the upper and lower polishing pads using a dressing tool, the dressing including rotating the respective polishing plate covered with the first polishing pad, the dressing tool being mounted in the gap in such a way that it extends from the inner edge to the outer edge of the first polishing pad, and a distance between the dressing tool and a second of the upper and lower polishing pads at the inner edge of the second polishing pad differing from a corresponding distance at the outer edge of the second polishing pad; and simultaneous double-side polishing the at least one semiconductor wafer in the gap after the dressing.
地址 Munich DE