Patterning multiple, dense features in a semiconductor device using a memorization layer

摘要

Provided are approaches for patterning multiple, dense features in a semiconductor device using a memorization layer. Specifically, an approach includes: patterning a plurality of openings in a memorization layer; forming a gap-fill material within each of the plurality of openings; removing the memorization layer; removing an etch stop layer adjacent the gap-fill material, wherein a portion of the etch stop layer remains beneath the gap-fill material; etching a hardmask to form a set of openings above the set of gate structures, wherein the etch to the hardmask also removes the gap-fill material from atop the remaining portion of the etch stop layer; and etching the semiconductor device to remove the hardmask within each of the set of openings. In one embodiment, a set of dummy S/D contact pillars is then formed over a set of fins of the semiconductor device by etching a dielectric layer selective to the gate structures.

主权项

1. A method of forming a semiconductor device, the method comprising:
providing a stack of layers formed over a set of gate structures, the stack of layers including a dielectric layer over the set of gate structures, a chemical mechanical planarization stop layer (CMPSL) over the dielectric layer, a hardmask over the CMPSL, an etch stop layer over the hardmask, and a memorization layer over the etch stop layer; patterning a plurality of openings in the memorization layer; forming a gap-fill material within each of the plurality of openings; removing the memorization layer; removing the etch stop layer adjacent the gap-fill material, wherein a portion of the etch stop layer remains beneath the gap-fill material; and etching the hardmask to form a set of openings above the set of gate structures, wherein the etch to the hardmask also removes the gap-fill material from atop the remaining portion of the etch stop layer.