Connecting Through Vias to Devices

摘要

Methods and devices for connecting a through via and a terminal of a transistor formed of a strained silicon material are provided. The terminal, which can be a source or a drain of a NMOS or a PMOS transistor, is formed within a substrate. A first contact within a first inter-layer dielectric (ILD) layer over the substrate is formed over and connected to the terminal. A through via extends through the first ILD layer into the substrate. A second contact is formed over and connected to the first contact and the through via within a second ILD layer and a contact etch stop layer (CESL). The second ILD layer is over the CESL, and the CESL is over the first ILD layer, which are all below a first inter-metal dielectric (IMD) layer and the first metal layer of the transistor.

主权项

1. A device comprising:
a transistor having a first source/drain region formed within a substrate, a second source/drain region formed within the substrate, and a gate structure overlying a channel region of the transistor, the channel region being between the first and second source/drain region; a first contact over and electrically connected to the first source/drain region, the first contact being within a first dielectric layer over the substrate; a through via extending through the first dielectric layer and into the substrate; and a second contact over the first contact and over the through via, the second contact being connected to the first contact and the through via, the second contact extending through a second dielectric layer and a third dielectric layer, the second dielectric layer being on the first dielectric layer and the third dielectric layer being on the second dielectric layer.