发明名称 論理回路
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a logic circuit capable of simplifying a manufacturing process while achieving a stable and high-speed operation. <P>SOLUTION: A logic circuit 1 comprises first and second FETs 2A, 2B connected in series between a bias supply and a ground and each having a gate terminal to which an input voltage is applied. The FET 2A between the first and second FETs 2A, 2B includes: a gate electrode film 17 to which the gate terminal is connected; a channel layer 12 composed of a semiconductor material; and a charge storage layer 16 arranged between the gate electrode film 17 and the channel layer 12 and including a charge storage structure storing and discharging an electric charge. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5835771(B2) 申请公布日期 2015.12.24
申请号 JP20110232085 申请日期 2011.10.21
申请人 国立大学法人北海道大学 发明人 葛西 誠也
分类号 H01L27/095;H01L21/336;H01L21/338;H01L21/8232;H01L21/8238;H01L27/06;H01L27/092;H01L29/778;H01L29/78;H01L29/788;H01L29/792;H01L29/812;H03K19/0952 主分类号 H01L27/095
代理机构 代理人
主权项
地址