发明名称 |
CONSECUTIVE BIT ERROR DETECTION AND CORRECTION |
摘要 |
Embodiments of an invention for consecutive bit error detection and correction are disclosed. In one embodiment, an apparatus includes a storage structure, a second storage structure, a parity checker, an error correction code (ECC) checker, and an error corrector. The first storage structure is to store a plurality of data values, a plurality of parity values, and a plurality of ECC values, each parity value corresponding to one of the plurality of data values, a first bit of each parity value corresponding to a first of a plurality of portions of a corresponding data value, wherein the first of the plurality of portions of the corresponding data value is interleaved with a second of the plurality of portions of the corresponding data value, wherein a second bit of each parity value corresponds to a second of the plurality of portions of the corresponding data value, each ECC value corresponding to one of the plurality of data values. The parity checker is to detect a parity error in a data value stored in the first storage structure using a parity value corresponding to the data value. The ECC checker is to generate a syndrome. The error corrector is to detect and correct consecutive bit errors in the data value using the syndrome. |
申请公布号 |
US2015370636(A1) |
申请公布日期 |
2015.12.24 |
申请号 |
US201414308107 |
申请日期 |
2014.06.18 |
申请人 |
Sole Guillem;Espasa Roger;Iacobovici Sorin;Hickmann Brian;Wu Wei;Fletcher Thomas |
发明人 |
Sole Guillem;Espasa Roger;Iacobovici Sorin;Hickmann Brian;Wu Wei;Fletcher Thomas |
分类号 |
G06F11/10;H03M13/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus comprising:
a storage structure in which to store a plurality of data values, a plurality of parity values, and a plurality of error correction code (ECC) values, each parity value corresponding to one of the plurality of data values, a first bit of each parity value corresponding to a first of a plurality of portions of a corresponding data value, wherein the first of the plurality of portions of the corresponding data value is interleaved with a second of the plurality of portions of the corresponding data value, wherein a second bit of each parity value corresponds to a second of the plurality of portions of the corresponding data value, each ECC value corresponding to one of the plurality of data values; a parity checker to detect a parity error in a data value stored in the first storage structure using a parity value corresponding to the data value; an ECC checker to generate a syndrome; and an error corrector to detect and correct consecutive bit errors in the data value using the syndrome. |
地址 |
Barcelona ES |