发明名称 SURFACES WITH EMBEDDED SENSING AND ACTUATION NETWORKS USING COMPLEMENTARY-METAL-OXIDE-SEMICONDUCTOR (CMOS) SENSING CHIPS
摘要 A device and method for area sensing and actuation comprises highly scalable sensing and actuation network that can control a high density of sensing and actuation elements over a physical area. The device comprises a matrix of CMOS sensing chips that each comprise a plurality of sensing electrodes arranged in a matrix of columns and rows along horizontal wires and vertical wires. The vertical wires carry an activation signal to activate a column of sensing electrodes, and the vertical wires carry sensing and actuation signals between the column of sensing electrodes and a processing chip. The signals may be amplified by CMOS sensing chips between the source and destination of the signals. In this way, signals may be received from and sent to a dense matrix of sensing electrodes spanning a large geographic area with little or no degradation.
申请公布号 US2015369634(A1) 申请公布日期 2015.12.24
申请号 US201514842502 申请日期 2015.09.01
申请人 INDIAN INSTITUTE OF SCIENCE 发明人 AMRUTUR BHARADWAJ;BHAT NAVAKANTA
分类号 G01D5/24 主分类号 G01D5/24
代理机构 代理人
主权项 1. A device comprising: a sensor chip including a plurality of electrodes arranged in a matrix of rows and columns, the plurality of electrodes including: a first set of electrodes connected to a set of sensor elements, wherein the first set of electrodes are operable to receive sensed signals from the set of sensor elements;a second set of electrodes connected to a set of actuation elements, wherein the second set of electrodes are operable to send actuation signals to the set of actuation elements to control an output of the set of actuation elements; a processor chip configured to be in communication with the sensor chip, the processor chip including: a set of decoders, each decoder being operable to activate a respective column of electrodes among the first and second sets of electrodes;a set of selection transistors, each selection transistor being operable to select a respective row of electrodes among the first and second sets of electrodes; the processor chip being operable to: control the set of decoders to activate at least one column of electrodes;receive a digital select signal;control the set of selection transistors to select at least one row of electrodes according to the first digital select signal;in response to the activation of the at least one column of electrodes, and in response to the selection of the at least one row of electrodes: receive sensed signals from a first portion of the first set of electrodes, wherein the first portion of the first set of electrodes is among the activated columns of electrodes and the selected rows of electrodes; andsend actuation signals to a second portion of the second set of electrodes, wherein the second portion of the second set of electrodes is among the activated columns of electrodes and the selected rows of electrodes, each actuation signal includes a time duration, and the actuation signals are effective to cause the set of actuation elements to produce a stimulation external to the device based on the time duration.
地址 BANGALORE IN