发明名称 SYSTEMS AND METHODS FOR TESTING PERFORMANCE OF MEMORY MODULES
摘要 A system and method for testing performance of a plurality of memory modules includes generating a clock signal at a set frequency and sending the clock signal to the memory modules. An initial data pattern is sent to an input of a first memory module. A subsequent data pattern received from the first memory module is delayed by a predetermined delay time and sent to an input of a last memory module. The initial data pattern and the subsequent data pattern received from the output of the last memory module are compared and a performance of the memory modules is also calculated.
申请公布号 US2015371719(A1) 申请公布日期 2015.12.24
申请号 US201414312837 申请日期 2014.06.24
申请人 GLOBALFOUNDRIES Singapore Pte. Ltd. 发明人 Nguyen Bai Yen;Lau Benjamin;Kang Chou-Te;Huang Yao Hsien
分类号 G11C29/38;G11C29/44;G11C29/36 主分类号 G11C29/38
代理机构 代理人
主权项 1. A method for testing performance of a plurality of memory modules including a first memory module and a last memory module, said method comprising: generating a clock signal at a set frequency with a clock generating circuit; sending the clock signal to the memory modules; generating an initial data pattern with a controller; sending the initial data pattern to an input of the first memory module; delaying a subsequent data pattern received from an output of the first memory module by a predetermined delay time; sending the subsequent data pattern to an input of the last memory module; receiving the subsequent data pattern from an output of the last memory module; comparing the initial data pattern to the subsequent data pattern received from the output of the last memory module with the controller; and calculating a performance of the memory modules with the controller.
地址 Singapore SG