发明名称 CLOCK-GATING PHASE ALGEBRA FOR CLOCK ANALYSIS
摘要 A design tool can implement phase algebra based design evaluation to evaluate a circuit design with a compact representation of numerous waveforms without simulating the individual waveforms. The design tool can determine an input sequence of signal transition representations associated with an input net of a component in RTL circuit design, where each signal transition representation represents a nondeterministic transition from a previous signal state to possible signal state(s). Determining the input sequence of signal transition representations includes determining that the input sequence of signal transition representations indicates an input gated clock waveform. The design tool also can determine, based on the indicated component and on the input gated clock waveform, an output sequence of signal transition representations derived from the input sequence of signal transition. Determining the output sequence includes determining whether signal transition representation(s) of the output sequence indicate an output gated clock waveform.
申请公布号 US2015370940(A1) 申请公布日期 2015.12.24
申请号 US201514840517 申请日期 2015.08.31
申请人 International Business Machines Corporation 发明人 Drasny Gabor;Meil Gavin B.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method comprising: determining an input sequence of signal transition representations associated with an input net of an indicated component in a register transfer level circuit design, wherein each signal transition representation represents a non-deterministic transition from a previous signal state to a set of one or more possible signal states, anddetermining the input sequence of signal transition representations comprises determining that the input sequence of signal transition representations indicates an input gated clock waveform; and determining, based on the indicated component and on the input gated clock waveform, an output sequence of signal transition representations derived from the input sequence of signal transition representations, wherein determining the output sequence of signal transition representations comprises determining whether at least one signal transition representation of the output sequence of signal transition representations indicates an output gated clock waveform.
地址 Armonk NY US