发明名称 LOW DELAY REAL-TO-COMPLEX CONVERSION IN OVERLAPPING FILTER BANKS FOR PARTIALLY COMPLEX PROCESSING
摘要 An arrangement of overlapping filter banks comprises a synthesis stage and an analysis stage. The synthesis stage receives a first signal segmented into time blocks and outputs, based thereon, an intermediate signal to be received by the analysis stage forming the basis for the computation of a second signal segmented into time frames. In an embodiment, the synthesis stage is operable to release an approximate value of the intermediate signal in a time block located L−1 time blocks ahead of its output block, which approximate value is computed on the basis of any available time blocks of the first signal, so that the approximate value contributes, in the analysis stage, to the second signal. The delay is typically reduced by L−1 blocks. Applications include audio signal processing in general and real-to-complex conversion in particular.
申请公布号 HK1205829(A1) 申请公布日期 2015.12.24
申请号 HK20150106207 申请日期 2015.06.30
申请人 DOLBY INTERNATIONAL AB 发明人 VILLEMOES, LARS;MUNDT, HARALD
分类号 H03H 主分类号 H03H
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