发明名称 PROCESSES USED IN FABRICATING A METAL-INSULATOR-SEMICONDUCTOR FIELD EFFECT TRANSISTOR
摘要 During fabrication, a second oxide layer is disposed over a first region and a second region of a structure. The second region includes a first oxide layer between the second oxide layer and an epitaxial layer. The first region corresponds to an active region of a metal-insulator-semiconductor field effect transistor (MISFET), and a first-type dopant source region, a second-type dopant body region, and a second-type dopant implant region are formed in the first region. The second region corresponds to a termination region of the MISFET. A mask is formed over the second region, and parts of the second oxide layer and the first oxide layer that are exposed through the gaps are removed, thereby exposing the epitaxial layer. Second-type dopant is deposited into the epitaxial layer through the resultant openings in the first and second oxide layers, thereby forming field rings for the MISFET.
申请公布号 WO2015195372(A1) 申请公布日期 2015.12.23
申请号 WO2015US34465 申请日期 2015.06.05
申请人 VISHAY-SILICONIX 发明人 TIPIRNENI, NAVEEN;PATTANAYAK, DEVA
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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