发明名称 DEMODULATION CIRCUIT OF 4-PHASE PSK WAVE IN TIME DIVISION MULTIPLEX SIGNAL
摘要 PURPOSE:To demodulate a 4-phase DPSK wave by actuating a signal processing circuit given intermittently with a 4-phase DPSK wave on a time axis as a loop filter duing the existing period of an intermission signal and as a hold circuit during absence period. CONSTITUTION:The 1st switch 2 extracts separately a 4-phase DPSK wave (hereinafter 4-phase wave) subjected to time division multiplex with other signals from other signals. Respective demodulation signals are obtained from the burst 4-phase wave by the 1st phase detector 3 and the 2nd phase detector 4. Each demodulation signal is fed to the 1st signal processing circuit 9 to generate an error signal in the state where the phase change corresponding to a modulation signal of the 4-phase wave is cancelled. The 2nd signal processing circuit 13 acts as a loop filter to an error signal of the circuit 9 when the 4-phase wave is fed to the phase detectors 3, 4, and acts like a hold circuit of the error signal of the circuit 9 during the period other than the said period. An output of the circuit 13 controls a voltage controlled oscillator 6, its output is fed respectively to the phase detectors 3, 4 to demodulate the 4-phase wave.
申请公布号 JPS6130849(A) 申请公布日期 1986.02.13
申请号 JP19840153562 申请日期 1984.07.24
申请人 VICTOR CO OF JAPAN LTD 发明人 ISHIGAKI YUKINOBU
分类号 H04L27/18;H04L27/227 主分类号 H04L27/18
代理机构 代理人
主权项
地址