发明名称 Variable mapping of memory accesses to regions within a memory
摘要 An apparatus for processing data 2 includes a memory 4 having a plurality of memory regions 28 to 38. A mapping controller 56 applies a variable mapping to map memory addresses of access requests to different regions within the memory 4. The mapping controller varies the mapping applied in dependence upon both one or more memory behavioral parameters indicative of behavioral characteristics of the different regions and one or more access behavioral parameters indicative of behavioral characteristics of an access request to be mapped. The memory behavioral parameters may include the temperature of the regions and/or the refresh period of the regions. The access behavior able parameters may include the quality of service level, the access frequency, the access volume and/or the identity of the source of the access request.
申请公布号 US9218285(B2) 申请公布日期 2015.12.22
申请号 US201213684700 申请日期 2012.11.26
申请人 ARM Limited 发明人 Udipi Anirruddha Nagendran;Saidi Ali;Hansson Andreas;Emmons Christopher
分类号 G06F12/00;G06F12/02;G06F12/06;G06F12/08;G11C7/04;G11C11/406;G11C11/408 主分类号 G06F12/00
代理机构 Pramudji Law Group PLLC 代理人 Pramudji Law Group PLLC ;Pramudji Ari
主权项 1. Apparatus for processing data comprising: a memory having a plurality of regions at a common level within a memory system; at least one memory access request source configured to generate an access request to a memory address within said memory; and a mapping controller configured to apply a variable mapping to map said memory address to one of said plurality of regions; wherein said mapping controller varies said mapping in dependence upon both: (i) one or more memory behavioral parameters indicative of one or more behavioral characteristics of different ones of said plurality of regions; and (ii) one or more access behavioral parameters indicative of behavioral characteristics of said access request; and wherein said memory is a dynamic memory requiring a periodic refresh operation to retain data values and said one or more memory behavioral parameters indicate maximum effective refresh periods of respective different ones of said plurality of regions.
地址 Cambridge GB
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