发明名称 Multicore system and activating method
摘要 A multicore system includes multiple processor cores; a scheduler in each of the processor cores and allocating a process to the processor cores when having a master authority that is an authority to assign processes; and a master controller performing control to repeat until a process to be executed no longer exists, a cycle in which the schedulers transfer the master authority to another processor core after receiving the master authority and before assigning a process to the processor cores, discards the master authority after assigning the process to the processor cores, and enters a state of waiting to receive the master authority.
申请公布号 US9218201(B2) 申请公布日期 2015.12.22
申请号 US201213622536 申请日期 2012.09.19
申请人 FUJITSU LIMITED 发明人 Yamashita Koichiro;Yamauchi Hiromasa
分类号 G06F9/50;G06F9/46;G06F9/48;G06F9/52 主分类号 G06F9/50
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. A multicore system comprising: a plurality of processor cores; one or more processes; a respective scheduler in each processor core of the plurality of processor cores configured to assign a process of the one or more processes to a processor core of the plurality of processor cores when having a master authority, the master authority being an authority to assign processes; a master controller performing control to repeat a cycle until all processes of the one or more processes are assigned, in which the respective scheduler in each processor core of the plurality of processor cores, respectively: receives the master authority,transfers the master authority to another scheduler in another processor core, the master authority being held by both the respective scheduler and the another scheduler, until the master authority is discarded by the respective scheduler, wherein the respective scheduler and the another scheduler may hold the master authority at the same time,assigns a process of the one or more processes to the each processor core of the plurality of processor cores,discards the master authority, andenters a state of waiting to receive the master authority from another scheduler.
地址 Kawasaki JP