| 发明名称 |
Hydrogen passivation of integrated circuits |
| 摘要 |
An integrated circuit with a passivation trapping layer. An integrated circuit with a hydrogen or deuterium releasing layer underlying a passivation trapping layer. Method for forming an integrated circuit having a hydrogen or deuterium releasing layer. Method for forming an integrated circuit having a passivation trapping layer. |
| 申请公布号 |
US9218981(B2) |
申请公布日期 |
2015.12.22 |
| 申请号 |
US201314066298 |
申请日期 |
2013.10.29 |
| 申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
Basim Gul B.;Summerfelt Scott R.;Moise Ted S. |
| 分类号 |
H01L21/30;H01L21/02;H01L21/768;H01L29/66;H01L29/78 |
主分类号 |
H01L21/30 |
| 代理机构 |
|
代理人 |
Keagy Rose Alyssa;Cimino Frank D. |
| 主权项 |
1. A process of forming an integrated circuit, comprising:
providing a partially processed integrated circuit that includes a transistor; passivating said partially processed integrated circuit; after said passivating step, depositing a passivation trapping layer over said transistor; forming a pre-metal dielectric (PMD) layer over said passivation trapping layer; and after the step of forming said PMD layer, etching at least one contact opening through said PMD layer and said passivation trapping layer to contact said transistor; wherein said at least one contact opening is located laterally adjacent to a gate of said transistor. |
| 地址 |
Dallas TX US |
