Stacked device and method of manufacturing the same

摘要

A stacked device encompasses a lower chip including a plurality of wiring lands and a plurality of wall-block patterns, each of the wall-block patterns is allocated at a position except locations where the wiring lands are disposed, each of the wall-block patterns has a inclined plane, a height of each of the wall-block patterns measured from a reference plane of the array of the wiring lands is higher than the wiring lands, and an upper chip including a plurality of wiring bumps assigned correspondingly to the positions of the wiring lands, respectively, and a plurality of cone bumps assigned correspondingly to the positions of the wall-block patterns, respectively.

主权项

1. A stacked device comprising:
a lower chip including a plurality of wiring lands dedicated to electrical connection positioned at a plurality of first lower chip positions and a plurality of wall-block patterns designed for position alignment positioned at a plurality of second lower chip positions, wherein, the plurality of second lower chip positions of the wall-block patterns are allocated to positions different than the plurality of first lower chip positions of the wiring lands, and wherein, each of the wall-block patterns has one or more inner planes, configured to define a closed concave side wall surrounding a bottom plane of the wall-block pattern, a height of each of the wall-block patterns measured from a reference plane of an array of the plurality of the wiring lands being equal to or greater than the wiring lands; and an upper chip including a plurality of wiring cone bumps corresponding to the plurality of first lower chip positions of the wiring lands, each of the wiring cone bumps having a deformable tip electrically connected to the wiring lands so as to achieve plane-to-plane contacts by compressed topology of the deformable tips through thermo-compression bonding, respectively, and a plurality of solid alignment cone bumps corresponding to the plurality of second lower chip positions of the wall-block patterns, each of the alignment cone bumps having a substantially undeformable tip defining an apex angle, respectively, so that each of the substantially undeformable tips contacts to a single contact point in the bottom plane, respectively, a position of the single contact point being guided by the concave side wall, such that contact between the alignment cone bumps and the concave side wall is minimized allowing one or more gaps between non-contact portion of the alignment cone bumps and other portions of the concave side wall.