Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op)

摘要

Embodiments of systems, apparatuses, and methods for performing in a computer processor a data element shuffle and an operation on the shuffled data elements in response to a single data element shuffle and an operation instruction that includes a destination vector register operand, a first and second source vector register operands, an immediate value, and an opcode are described.

主权项

1. A method of performing in a computer processor a data element shuffle and an operation on the shuffled data elements in response to a single data element shuffle and an operation instruction that includes a destination vector register operand, a first and second source vector register operands, an immediate value, and an opcode, the method comprising steps of:
executing the single data element shuffle and an operation instruction to shuffle data elements of the first source register by a number of data elements wherein the number of data elements is defined by the immediate value of the instruction and perform the operation defined by the opcode on the shuffled data elements of the first source vector register with non-shuffled data elements of the second source vector register; and storing a result of each operation in a corresponding packed data element position of the destination vector register.