发明名称 |
Germanium-based quantum well devices |
摘要 |
A quantum well transistor has a germanium quantum well channel region. A silicon-containing etch stop layer provides easy placement of a gate dielectric close to the channel. A group III-V barrier layer adds strain to the channel. Graded silicon germanium layers above and below the channel region improve performance. Multiple gate dielectric materials allow use of a high-k value gate dielectric. |
申请公布号 |
US9219135(B2) |
申请公布日期 |
2015.12.22 |
申请号 |
US201314057204 |
申请日期 |
2013.10.18 |
申请人 |
Intel Corporation |
发明人 |
Pillarisetty Ravi;Jin Been-Yin;Chu-Kung Benjamin;Metz Matthew V.;Kavalieros Jack T.;Radosavljevic Marko;Kotlyar Roza;Rachmady Willy;Mukherjee Niloy;Dewey Gilbert;Chau Robert S. |
分类号 |
H01L29/775;H01L29/165;H01L29/267;H01L29/66;H01L29/778;H01L29/51 |
主分类号 |
H01L29/775 |
代理机构 |
Winkle, PLLC |
代理人 |
Winkle, PLLC |
主权项 |
1. A device, comprising:
a lower barrier region comprising a large band gap material; a quantum well channel region comprising germanium on the lower barrier region; an upper barrier region comprising a large band gap material on the quantum well region; a spacer region on the quantum well channel region; an etch stop region on the spacer region, the etch stop region comprising silicon and being substantially free from germanium; a gate dielectric on the etch stop region; a gate electrode on the gate dielectric; a doped region on the lower barrier region, the doped region comprising silicon germanium doped with boron; and a lower spacer region comprising silicon germanium on the doped region and under the quantum well channel region. |
地址 |
Santa Clara CA US |