| 摘要 |
1,154,607. Integrated circuits. RAYTHEON CO. 31 Oct., 1967 [31 Oct., 1966], No. 49489/67. Heading H1K. The integrated array of Fig. 1 has a plurality of N+ silicon islands 12 each bearing an epitaxial N-type layer 18 and supported by a thin polycrystalline silicon layer 14, and a reinforcing grid 20 of mono-crystalline silicon, the islands and the grid being insulated from the supporting layer by an oxide layer 15. The islands and grid are obtained from a single silicon crystal-with (100) major faces, the epitaxial layer 18 being formed over the crystal before the islands and grid are separated. The polycrystalline silicon supporting layer 14 is also deposited on the oxide coated crystal before its division. The crystal is then divided by etching or chemical milling, and individual devices such as transistors, diodes, and resistors are produced in the islands by conventional techniques, and are provided with evaporated aluminium contacts to which wires are bonded.
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