| 发明名称 |
OUTPUT RESISTANCE TESTING STRUCTURE AND METHOD OF USING THE SAME |
| 摘要 |
A testing structure includes a first transistor having a first dopant type connected to a current source. The testing structure further includes a second transistor having a second dopant type, opposite to the first dopant type. The second transistor is connected to a device under test (DUT). The second transistor is connected in series with the first transistor in a cascode arrangement. The cascode arrangement is capable of measuring an output resistance of the DUT of greater than 1 mega-ohm (MΩ). |
| 申请公布号 |
US2015362539(A1) |
申请公布日期 |
2015.12.17 |
| 申请号 |
US201514711900 |
申请日期 |
2015.05.14 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHOU Wen-Shen;KANG Po-Zeng;PENG Yung-Chow |
| 分类号 |
G01R27/02;G01R27/08 |
主分类号 |
G01R27/02 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A testing structure comprising:
a first transistor having a first dopant type connected to a current source; a second transistor having a second dopant type, opposite to the first dopant type, the second transistor connected to a device under test (DUT), wherein the second transistor is connected in series with the first transistor in a cascode arrangement, and the cascode arrangement is capable of measuring an output resistance of the DUT of greater than 1 mega-ohm (MΩ). |
| 地址 |
Hsinchu TW |
