发明名称 MARGIN TOOL FOR DOUBLE DATA RATE MEMORY SYSTEMS
摘要 A tool for testing a double data rate (“DDR”) memory controller to ensure that data strobe transitions are aligned with data eyes to achieve a desired data integrity during data transfers between the memory controller and the memories. After the memory controller completes its training sequence during the initialization process, the tool sweeps the data strobe transition across the data eye. At each timing step during the sweep, several tests may be conducted to check for integrity of functionality. The tool thus generates a pass/fail margin table. The locations of the data strobe transitions selected by the memory controller during its previously run training sequence are then added to this tool-generated margin table. The result is essentially a pseudo data eye, reconstructed including the data strobe transition with the data eye. An inspection of the location of the data strobe transition with the data eye may be utilized to show the range of timing steps available before the data strobe transition would fail to capture valid data from the incoming data eye.
申请公布号 US2015364212(A1) 申请公布日期 2015.12.17
申请号 US201414302609 申请日期 2014.06.12
申请人 Freescale Semiconductor, Inc. 发明人 RAZZAZ MAZYAR;BURCH KENNETH R.;WELKER JAMES A.
分类号 G11C29/02;G06F17/50;G11C7/22 主分类号 G11C29/02
代理机构 代理人
主权项 1. A tool for testing double data rate transfers of data between a memory controller and a memory device, the tool comprising: circuitry for receiving a double data rate strobe placement value indicating where a training sequence performed by the memory controller has placed a double data rate strobe transition within a data eye transferred between the memory device and the memory controller; circuitry for receiving a range of double data rate strobe transition settings that transferred data during a testing of double data rate transfers between the memory controller and the memory device by the tool; circuitry for comparing the double data rate strobe placement value to the range of double data rate strobe transition settings; and circuitry for outputting information representing where the double data rate strobe placement value resides within the range of double data rate strobe transition settings.
地址 Austin TX US