发明名称 ERROR DETECTION IN STORED DATA VALUES
摘要 A data storage apparatus is provided which has a plurality of data storage units, each respective data storage unit configured to store a respective data bit of a data word. Stored data value parity generation circuitry is configured to generate a parity bit for the data word in dependence on the data bits of the data word stored in the plurality of data storage units. The stored data value parity generation circuitry is configured such that switching within the stored data value parity generation circuitry does not occur when the data word is read out from the plurality of data storage units. Transition detection circuitry is configured to detect a change in value of the parity bit.
申请公布号 US2015363267(A1) 申请公布日期 2015.12.17
申请号 US201414306697 申请日期 2014.06.17
申请人 ARM Limited 发明人 CHANDRA Vikas;AITKEN Robert Campbell
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项 1. A data storage apparatus comprising: a plurality of data storage units, each respective data storage unit configured to store a respective data bit of a data word; stored data value parity generation circuitry configured to generate a parity bit for the data word in dependence on the data bits of the data word stored in the plurality of data storage units, wherein the stored data value parity generation circuitry is configured such that switching within the stored data value parity generation circuitry does not occur when the data word is read out from the plurality of data storage units; and transition detection circuitry configured to detect a change in value of the parity bit.
地址 Cambridge GB