发明名称 INTERFACE CIRCUIT AND INFORMATION PROCESSING SYSTEM
摘要 In this invention, signals are transported at high speed in a direction opposite the transport direction of a main high-capacity channel. A differential signal consisting of a first signal that contains a clock component is transmitted to an external device, via a channel, by a first transmission unit. A second transmission unit transmits a common-mode signal to the external device, said common-mode signal consisting of a second signal that contains a clock component, by superimposing said common-mode signal onto the channel. A state notification unit communicates with the external device via a pair of differential channels included in the aforementioned channel and uses a DC bias potential in at least one of said differential channels to notify the external device of the connection state of the apparatus containing this first transmission unit, second transmission unit, and state notification unit.
申请公布号 WO2015190153(A1) 申请公布日期 2015.12.17
申请号 WO2015JP58880 申请日期 2015.03.24
申请人 SONY CORPORATION 发明人 TOBA, KAZUAKI;ICHIMURA, GEN
分类号 H04L25/02;H04N21/436 主分类号 H04L25/02
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