| 摘要 |
PROBLEM TO BE SOLVED: To provide a variable divider circuit which can increase a maximum operation frequency and does not request a circuit for retiming a division ratio setting signal to perform a high-speed operation.SOLUTION: Respective dual modulus dividers 201, 202 synchronize an output clock signal and an output division ratio control signal of an own circuit with different edges of the same input clock, and receive a given division ratio control signal with a latch circuit serving an output clock of the own circuit as a clock and determine a division ratio according to an output signal of the latch circuit. |
