发明名称 Reconfigurable device
摘要 Disclosed is a reconfigurable device including at least a bus that mutually connects functional blocks, a configuration information memory disposed corresponding to each of the functional blocks, an error detection circuit that detects an error in the configuration information memory, and a buffer which is on-off controlled based on information stored in the configuration information memory and each of which controls connection between each of the functional blocks and each bus. When an error in the configuration information memory is detected by the error detection circuit, the buffer with an output thereof connected to the bus is set to an off-state, based on a result of error detection.
申请公布号 US2009013219(A1) 申请公布日期 2009.01.08
申请号 US20080213959 申请日期 2008.06.26
申请人 NEC ELECTRONICS CORPORATION 发明人 KITAOKA TOSHIROU;FUJII TARO
分类号 G06F9/00;G06F11/00 主分类号 G06F9/00
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