| 摘要 |
A semiconductor memory device is provided to detect the fail of the memory cell by detecting bridge generated between the bit line bar and the bit line. In a semiconductor memory device, a redundancy bit line sense amplifier(100) amplifies data loaded to the redundancy bit line pair(RBL, /RBL). A bit line sense AMP(102) amplifies data loaded in the bit line pair(BL0, /BL0) and a bit line sense AMP(104) amplifies data loaded to the bit line pair(BL1, /BL1). A setting-up level unit(106) comprises a NMOS transistor(N7) receiving the repair status signal, and a setting-up level unit(108) comprises a NMOS transistor(N8) receiving the repair status signal RYSFLAG. A setting-up level unit(110) comprises the NMOS transistor N9 receiving the repair status signal. A redundancy column selecting unit(112) comprises the NMOS transistor(N10, N11) receiving the redundancy column select signal(RYS). A column selection part(114) comprises the NMOS transistor(N12, N13) receiving the column select signal, and a column selection part(116) comprises the NMOS transistor(N14, N15) receiving the column select signal. |
