发明名称 AUTOMATIC DEFECT REVIEW AND CLASSIFICATION SYSTEM
摘要 The invention proposes a system that interrupts a processing associated with an ADC having low priority when an ADC processing cannot catch up with ADR by an ADC alone that is not under execution but uses an ADC for an ADR having high priority. To preferentially execute ADR/ADC having high priority, the invention employs an algorithm for serially selecting ADR/ADC in the order of higher processing capacity (in the order of greater numerical values in the expression by a DPH unit) from among ADR/ADCs that have the lowest priority, no matter whether the ADR/DC is now under execution or not.
申请公布号 US2010021047(A1) 申请公布日期 2010.01.28
申请号 US20090573463 申请日期 2009.10.05
申请人 HITACHI HIGH-TECHNOLOGIES CORPORATION. 发明人 HIRAI TAKEHIRO;AOKI KAZUO;OBARA KENJI
分类号 G06K9/00;G01N23/225;H01L21/02;H01L21/66 主分类号 G06K9/00
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