EMBEDDED FLASH MEMORY TEST CIRCUIT

摘要

PURPOSE: An embedded flash memory test circuit is provided to reduce the test time of the memory cell array by compressing read data to compressed data. CONSTITUTION: The embedded flash memory cell array(110) at a time outputs a plurality of read data. The ROM BIST (Built In Self Test) unit(150) compresses read data. The ROM BIST control unit(200) controls the operation of the ROM BIST unit. The comparison unit(170) compares compressed data and estimated data.