| 摘要 |
PURPOSE: A semiconductor memory device is provided to perform a parallel test operation stably in a high frequency by extending an enable section of a strobe signal transmitting a compression result of data to a data input/output line. CONSTITUTION: A transmission unit(320) transmits a compression result of data, which are read from a bank(310), to a data input/output line in response to a strobe signal. A control unit(340) generates the strobe signal enabled according to a read command of the bank in a parallel test process. The control unit extends an enable section of the strobe signal according to a clock frequency higher than a predetermined frequency. The control unit comprises a pulse width control unit and a selecting unit. The pulse width control unit generates a second signal where an enable section of a first signal is extended in the parallel test process. The selecting unit selectively outputs the first and second signals as the strobe signal according to the clock frequency. |
