| 摘要 |
A clock generating circuit and a data outputting device using the same are provided to control timing according to PVT change by controlling the generation timing of a rising clock and a falling clock according to the cutting state of a fuse. A clock generating circuit(2) is comprised of a fuse unit(20), a control signal generator(22), a clock delay unit(24) and a clock generator(26). The fuse unit generates a fuse signal according to the cutting state of the fuse. The control signal generator generates the control signal in response to the fuse signal. A clock delay unit generates the delay clock by delaying the external clock as much as the delay section determined by the control signal. The clock generator is synchronized with the rising edge of the delay clock and generates the clock. The clock generator is synchronized with the falling edge of the delay clock and generates the internal clock.
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