发明名称 SEMICONDUCTOR TESTING APPARATUS AND SEMICONDUCTOR TESTING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To obtain a semiconductor testing apparatus, capable of reliably determining whether a semiconductor memory is good or bad, and a semiconductor testing method. <P>SOLUTION: A "1" reading test of each cell corresponding to one bit at a step 440a is first performed on a memory cell array 110, and "0" writing of each cell corresponding to one bit at a step 440b and a "0" reading test of each cell corresponding to one bit at a step 440c are executed on the memory cell array. Thus, the time taken from the supply of power to the start of "0" reading test of a reference cell at the step 440c can be significantly shortened. As a result, the defect of a reference bit line 116b due to the disconnection or high resistance of a gate 126g of a reference column switch transistor 126 which is a normally ON transistor, can be screened. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009087430(A) 申请公布日期 2009.04.23
申请号 JP20070254362 申请日期 2007.09.28
申请人 OKI SEMICONDUCTOR CO LTD 发明人 HIROTA TERUHIRO
分类号 G11C29/56;G01R31/28;G11C16/02;G11C16/06;H01L21/66;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C29/56
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