发明名称 LOGICAL VALUE DETERMINATION METHOD AND LOGICAL VALUE DETERMINATION PROGRAM
摘要 <p>It is an object to provide a logical value determination method and a logical value determination program that can specify an undetermined value bit, which does not lower a test judgment capability, and determine a logical value of the undetermined value bit in a short time. A determination method of a logical value of an undetermined value, which adjusts the total number of differences in logical value between a corresponding external input and output lines of a combination circuit (11), is provided with a first logical value determination operation that, when the external output line has a logical value and the external input line has an undetermined value, regards a logical value of the undetermined value bit as the logical value of the external output line, a second logical value determination operation that, when the external output line has an undetermined value and the external input line has a logical value, determines a logical value of the undetermined value bit by a justification operation, and a third logical value determination operation that, when the external input and output lines have undetermined values, calculates probabilities that the external output line becomes logical value 0 and 1, respectively, and determines a logical value of the undetermined value bit of the external input line based on a difference between the probabilities, wherein the third logical value determination operation is repeated until the total number of logical value differences reaches a target value.</p>
申请公布号 WO2009051193(A1) 申请公布日期 2009.04.23
申请号 WO2008JP68778 申请日期 2008.10.16
申请人 KYUSHU INSTITUTE OF TECHNOLOGY;MIYASE, KOHEI;WEN, XIAOQING;KAJIHARA, SEIJI 发明人 MIYASE, KOHEI;WEN, XIAOQING;KAJIHARA, SEIJI
分类号 G01R31/28;G01R31/3183;H03K19/23 主分类号 G01R31/28
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