HIGH-K CAPPED BLOCKING DIELECTRIC BANDGAP ENGINEERED SONOS AND MONOS

摘要

A blocking dielectric band gap engineered SONOS and MONOS are provided to suppress the gate injection with the high -k capping layer and to realize the lower elimination saturation level and the larger memory window. The charge trapping memory comprises the semiconductor body and the dielectric stack. The dielectric stack is positioned between the surface of channel and the gate of the semiconductor body. The tunneling dielectric layer, and the charge trapping dielectric layer and the blocking dielectric layer are included. The blocking dielectric layer comprises the first layer(17A) contacting the charge trapping dielectric layer and the second level (17B) contacting one of the gate and the surface of channel. The dielectric constant of the second layer is higher than the dielectric constant of the first layer.